Research Objective
To detect inverter fault conditions and maintain regulated AC output through AI-assisted control or reconfiguration in a single-phase H-bridge PWM inverter model.
System Architecture
The model includes DC source, H-bridge switches, PWM generator, LC output filter, load, voltage/current sensors, fault insertion logic, AI decision block and fault-tolerant control or protection action.
Simulation Methodology
Switch open-circuit, short-circuit style events, sensor drift and load disturbances are introduced to evaluate fault detection, classification and control recovery. Output waveform quality is compared before and after fault-tolerant action.
Validation Scenarios
- Healthy inverter operation at rated load
- Switch fault or gating-fault event insertion
- Load-step and DC-link variation cases
- AI-based fault indicator response
- Output voltage recovery and THD comparison
Expected Graphs and Result Discussion
A complete result section should include the main waveforms, controller response, operating status and comparison tables needed for engineering thesis documentation. For this project, the important graph set includes:
- PWM gate signals
- Output voltage/current waveforms
- Fault detection flag
- DC-link voltage and load power
- THD and recovery-time comparison
Thesis and Research Extension Ideas
CNN/LSTM fault diagnosis, adaptive PWM, model predictive fault-tolerant control and real-time hardware-in-loop validation can be added for advanced research.